/*
 * Automatically generated by make menuconfig: don't edit
 */
#define AUTOCONF_INCLUDED
#define ASIC_BOARD 1
#undef  RT2880_ASIC_BOARD
#undef  RT3350_ASIC_BOARD
#undef  RT3052_ASIC_BOARD
#undef  RT3352_ASIC_BOARD
#undef  RT3883_ASIC_BOARD
#undef  RT5350_ASIC_BOARD
#undef  RT6855A_ASIC_BOARD
#define MT7620_ASIC_BOARD 1
#undef  MT7621_ASIC_BOARD
#undef  MT7628_ASIC_BOARD
#define MT7620_MP 1
#define USING_RTL_SWITCH 1
#undef  MAC_TO_MT7530_MODE
#undef  P5_MAC_TO_NONE_MODE
#undef  P5_MAC_TO_PHY_MODE
#define P5_RGMII_TO_MAC_MODE 1
#undef  P5_MII_TO_MAC_MODE
#undef  P5_RMII_TO_MAC_MODE
#define GPIOx_RESET_MODE 1
#define P4_MAC_TO_NONE_MODE 1
#undef  P4_MAC_TO_PHY_MODE
#undef  P4_RGMII_TO_MAC_MODE
#undef  P4_MII_TO_MAC_MODE
#undef  P4_RMII_TO_MAC_MODE
#undef  ON_BOARD_NAND_FLASH_COMPONENT
#define ON_BOARD_SPI_FLASH_COMPONENT 1
#undef  ON_BOARD_SDR
#undef  ON_BOARD_DDR1
#define ON_BOARD_DDR2 1
#undef  ON_BOARD_256M_DRAM_COMPONENT
#define ON_BOARD_512M_DRAM_COMPONENT 1
#undef  ON_BOARD_1024M_DRAM_COMPONENT
#undef  ON_BOARD_2048M_DRAM_COMPONENT
#undef  ON_BOARD_DDR_WIDTH_8
#define ON_BOARD_DDR_WIDTH_16 1
#define ON_BOARD_16BIT_DRAM_BUS 1
#define PDMA_NEW 1
#define RX_SCATTER_GATTER_DMA 1
#define CONFIG_TINY_UBOOT 1
#undef  UBOOT_RAM
#define UBOOT_ROM 1
#define CPLL_FROM_CONF 1
#undef  CPLL_NONE
#define CPU_PLL_PARAMETERS 0x1
#define CPLL_MULTI_RATIO_CFG 0x5
#define CPLL_DIV_RATIO_CFG 0x0
#define CPLL_SSC_CFG 0x7
#undef  DUAL_IMAGE_SUPPORT
#define LAN_WAN_PARTITION 1
#undef  RALINK_DEMO_BOARD_PVLAN
#define RALINK_EV_BOARD_PVLAN 1
#define TEXT_BASE 0xBC000000
#define CFG_WAN_AT_P4